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intermediate frequency transmitter, 800 mhz to 4000 mhz data sheet h mc8200lp5me rev. b document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of thir d parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their r espective owners. one t echnology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2016 analog devices, inc. all rights reserved. technical support www.analog.com features h igh linearity: supports modulations to 1024 qam t x if range: 20 0 mhz to 7 00 mhz t x rf range: 800 mhz to 4000 mhz t x power c ontrol: 25 db spi controlled interface 32- lead, 5 mm 5 mm lfcsp package applications point to point communications satel lite communications wireless microwave backhaul systems functional block dia gram 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 sdi sclk sen lo_p lo_n vcc_irm vcc_env env_p env_n d2s_out vcc_d2s vva_in vga_vctrl vcc_vga tx_out vcc_amp package base tx_ifin dga_s1_out dga_s2_in log_if slpd_out vcc_bg log_rf vcc_log sdo dvdd rst bb_ip bb_in vcc_dga bb_qn bb_qp 1 3 4 2 5 6 7 8 9 12 11 10 13 14 15 16 spi band gap 13868-001 hmc8200 figu re 1. general description the hmc8200lp5me is a highly integrated int ermediate frequency ( if ) transmitter chip that converts the industry standard 300 mhz to 400 mhz i f input signals to an 800 mhz to 4 000 mhz single - ended radio frequency ( r f) signal at its output. the if t ransmitter chip is housed in a compact 5 mm 5 mm lfcsp package and supports complex modulations up to 1024 qam. the hmc8200lp5me simultaneously reduces the design complexity of traditional microwave radios while realizing significant size and cost improvements. with if input power ranges from ?31 dbm to +4 dbm, the hmc8200lp5me provides 35 db of dig ital gain control in 1 db steps and an analog voltage gain amplifier (vga) continuously controls the transmitter output power from ?20 dbm to +5 dbm. the device also features three integrated power detectors. the first d etector (log_if) can be utilized to monitor the if input power. the second detector (slpd_out) is a square law power detector that monitors the power entering the mixer. the third power detector (log_rf) is used to monitor the output power, which can be used for fine output power adjustment.
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hmc8200lp5me data sheet rev. b | page 2 of 25 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 elec trical characteristics: 800 mhz to 1800 mhz rf frequency range .......................................................................... 3 electrical characteristics: 1800 mhz to 2800 mhz rf frequency range .......................................................................... 4 electrical characteristics: 2800 mhz to 4000 mhz rf frequency range .......................................................................... 5 absolute maximum ratings ............................................................ 6 esd caution ...................................................................................6 pin configuration and function descriptions ..............................7 typical performance characteristics ..............................................8 theory of operation ...................................................................... 18 register array assignments and serial interface ................... 18 register descriptions ..................................................................... 20 register array assignments ...................................................... 20 evaluation printed circuit board (pcb) ..................................... 23 evaluation pcb schematic ........................................................ 24 outline dimensions ....................................................................... 25 ordering guide .......................................................................... 25 revision history 6/ 2016 v01. 0216 to rev. b this hittite microwave products data sheet has been reformatted to meet the styles and standards of analog devices, inc. updated format .................................................................. universal added pin configuration diagram, renumbered sequentially ....................................................................................... 7 added ordering guide .................................................................. 22 change to y-axis labe l, figure 42 ................................................ 14
data sheet hmc8200lp5me rev. b | page 3 of 25 specifications t a = 25c, if frequency = 35 0 mhz, local oscillator (lo) input signal level = 0 dbm, rf input signal level = ?31 dbm per tone, dga setting (dec) = 35 (maximum gain) , vga setting = 3.3 v (maximum gain), sideband select = lower sideband, unless otherwise noted. electrical character istics : 800 mh z to 1800 mh z rf frequency range table 1 . parameter min typ max unit operating conditions lo frequency range 3 00 23 00 mhz if frequency range 20 0 7 00 mhz i f input interfa ce input impedance 50 return loss 2 0 db log if power detector1 db dynamic range 50 db log if power detector range ?30 +10 dbm log if power detector slope 37 mv/db square log power detector range 17 db rf out put interface input impedance 50 return loss 7 13 db log p ower detector1 db dynamic range 50 db log power detector range ?25 +10 dbm log power detector slope 37 mv/db lo input interface input impedance 50 return loss 7 12 db dynamic performance conversion gain 30 34 db d igital vga dynamic range 30 35 db analog vga dynamic range 23 27 db sideband rejection 1 28 32 dbc noise figure 6 db output third - order intercept (oip3) 28 31 dbm output 1 db compression point (op1db) 11 15 dbm lo to rf rejection 1 30 db c if to rf rejection 56 63 db c power supply supply voltage v cc x 3.3 v v cc _ vga 2 3.3 v supply current v cc x 540 ma v cc _vga 2 11 a 1 measurement was taken uncalibrated. 2 v cc _vga can be adjusted from 3.3 v ( maximum gain) to 0 v (minimum gain) to control the rf vga.
hmc8200lp5me data sheet rev. b | page 4 of 25 electrical character istics: 1800 mh z to 2800 mh z rf frequency range table 2 . parameter min typ max unit operating conditions lo frequency range 1300 3300 mhz if frequency range 200 700 mhz if input interface inp ut impedance 50 return loss 20 db log if power detector1 db dynamic range 50 db log if power detector range ?30 +10 dbm log if power detector slope 37 mv/db square log power detector range 17 db rf output interface input impedance 50 return loss 12 15 db log power detector1 db dynamic range 50 db log power detector range ?25 +10 dbm log power detector slope 37 mv/db lo input interface input impedance 50 return loss 8 15 db dynamic performance conversio n gain 28 32 db digital vga dynamic range 30 35 db analog vga dynamic range 22 26 db sideband rejection 1 28 32 dbc noise figure 5.5 db output third - order intercept (oip3) 25 28 dbm output 1 db compression point (op1db) 10 15 dbm lo to rf re jection 1 34 dbc if to rf rejection 55 58 dbc power supply supply voltage v cc x 3.3 v v cc _vga 2 3.3 v supply current v cc x 540 ma v cc _vga 2 11 a 1 measurement was taken uncalibrated. 2 v cc _vga can be adjusted from 3.3 v (maximum gain) to 0 v (minimum gain) to control the rf vga.
data sheet hmc8200lp5me rev. b | page 5 of 25 electrical character istics: 2800 mh z to 4000 mh z rf frequency range table 3 . parameter min typ max unit operating conditions lo frequency range 2300 4500 mhz if frequency range 200 700 mhz if input interface input impedance 50 return loss 20 db log if power detector1 db dynamic range 50 db log if power detector range ?30 +10 dbm log if power detector slope 37 mv/db square log power detector range 17 db rf output interface input impeda nce 50 return loss 15 23 db log power detector1 db dynamic range 50 db log power detector range ?25 +10 dbm log power detector slope 37 mv/db lo input interface input impedance 50 return loss 12 17 db dynamic performance con version gain 22 30 db digital vga dynamic range 30 35 db analog vga dynamic range 20 25 db sideband rejection 1 22 30 dbc noise figure 5.5 db output third - order intercept (oip3) 20 26 dbm output 1 db compression point (op1db) 7 14 dbm lo to rf rejection 1 32 dbc if to rf rejection 50 55 dbc power supply supply voltage v cc x 3.3 v v cc _vga 2 3.3 v supply current v cc x 540 ma v cc _vga 2 11 a 1 measurement was taken uncalibrated. 2 v cc _vga can be adj usted from 3.3 v (maximum gain) to 0 v (minimum gain) to control the rf vga.
hmc8200lp5me data sheet rev. b | page 6 of 25 absolute maximum rat ings table 4 . parameter rating i f input 10 dbm lo input 10 dbm v cc x ?0.5 v to +5.5 v digital input/output ?0.3 v to +3.6 v maximum junction temperature to maintain 1 million hour mttf 150c thermal resistance (r th ), junction to ground paddle 1 1 c/w temperature operating ?40c to +85c storage ?65c to +150c maximum peak reflow temperature (msl3) 260c esd sensitivity (human body model) 2000 v (class 2) stresses at or above those listed u nder absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implie d. operation beyond the maximum operating conditions for extended periods may affect product reliability. esd caution
data sheet hmc8200lp5me rev. b | page 7 of 25 pin configuration an d function descripti ons 13868-100 24 env_n 23 d2s_out 22 vcc_d2s 21 vva_in 20 vga_vctrl 19 vcc_vga 18 tx_out 17 vcc_amp 1 2 3 4 5 6 7 8 sdo dvdd rst bb_ip bb_in vcc_dga bb_qn bb_qp 9 10 1 1 12 13 14 15 16 tx_ifin dga_s1_out dga_s2_in log_if slpd_out vcc_bg log_rf vcc_log 32 31 30 29 28 27 26 25 sdi sclk sen lo_p lo_n vcc_irm vcc_env env_p hmc8200 t o p view (not to scale) notes 1. connect exposed ground paddle to rf/dc ground. figure 2 . pin c onfiguration table 5 . pin function descriptions pin no. mnemonic description 1 sdo spi serial data output. 2 dvdd spi digital supply. refer to figure 64 for the required external components. 3 rst spi reset. connect to lo gic high for normal operation. 4, 5 bb_ip, bb_in positive and negative filter baseband if i inputs. 6 vcc_dga power supply for the digital variable gain amplifier. refer to figure 64 for the required external com ponents. 7, 8 bb_qn, bb_qp negative and positive filter baseband if q inputs. 9 t x _ifin transmit (tx) if input , intermediate frequency input port. this pin is matched to 50 ?. 10 dga_s1_out power supply for the first stage digital gain amplifier. this p in is matched to 50 ? . refer to figure 64 for the required external components. 11 dga_s2_in second stage digital gain amplifier input. 12 log_if if log detector output. 13 slpd_out square law detector output. 14 vcc_bg band gap supply. power supply voltage for the bias control ler. refer to figure 64 for the required external components. 15 log_rf rf log detector output. 16 vcc_log rf log detector supply. refer to figure 64 for the required external components. 17 vcc_amp power supply for the rf output amplifier. refer to figure 64 for the required external components. 18 t x _out tx chi p output. 19 vcc_vga power supply for the variable gain amplifier. refer to figure 64 for the required external components. 20 vga_ v ct r l vga control voltage. refer to figu re 64 for the required external components. 21 vva_in vva intermediate frequ enc y input port. this pin is matched to 50 ?. 22 vcc_d2s differential to single amplifier supply. refer to figure 64 for the required external components. 23 d2s_out differential to single amplifier intermediate frequ en cy ou t put port. this pin is matched to 50 ?. 24 , 25 env_n , env_p envelope detector output s . 26 vcc_env envelope detector supply. refer to figure 64 for the required external components. 27 vcc_irm power supply for the mixer output. refer to figure 64 for the required external components. 28 , 29 lo_n , lo_p local oscillator input s . th ese pin s are ac - coupled and matched to 50 ?. 30 sen spi serial enable. 31 sclk spi clock digital input. 32 sdi spi serial d ata input. epad exposed pad. connect exposed ground paddle to rf/dc ground.
hmc8200lp5me data sheet rev. b | page 8 of 25 typical performance characteristics 50 ?20 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 conversion gain (db) rf frequency (ghz) ?10 0 10 20 30 40 dga max , t a = +85c dga max , t a = +25c dga max , t a = ?40c dga min , t a = +85c dga min , t a = +25c dga min , t a = ?40c 13868-002 figure 3. conversion gain vs. rf frequency over temperature, lower sideband 45 0 sideband rejection (dbc) 5 10 15 20 25 30 35 40 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-003 figure 4. sideband rejection vs. rf frequency over temperature, lower sideband 40 0 ip3 (dbm) 5 10 15 20 25 30 35 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-004 figure 5. output ip3 vs. rf frequency over temperature, lower sideband 50 ?20 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 conversion gain (db) rf frequency (ghz) ?10 0 10 20 30 40 13868-005 dga max , t a = +85c dga max , t a = +25c dga max , t a = ?40c dga min , t a = +85c dga min , t a = +25c dga min , t a = ?40c figure 6. conversion gain vs. rf frequency over tem perature, upper sideband 90 0 sideband rejection (dbc) 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 10 20 30 40 50 60 70 80 13868-006 figure 7. sideband rejection vs. rf frequency over temperature, upper sideband 40 0 ip3 (dbm) 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 5 10 15 20 25 30 35 13868-007 figure 8. output ip3 vs. rf frequency over temperature, upper sideband
data sheet hmc8200lp5me rev. b | page 9 of 25 0 ?65 im3 (dbc) ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-008 figure 9. im3 vs. rf fre q uency over temperature , lower sideband 20 0 p1db (dbm) 2 4 6 8 10 12 14 16 18 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-009 figure 10 . output p1db vs. rf fre q uency over temperature, lower sideband 16 0 4 10 14 8 2 6 12 noise figure (db) 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-010 figure 11 . noise figure vs. rf fre q uency over tempera ture, lower sideband 0 ?65 im3 (dbc) ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-0 1 1 figure 12 . im3 vs. rf fre q uency over temperature , upper sideband 20 0 p1db (dbm) 2 4 6 8 10 12 14 16 18 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-012 figure 13 . output p1db vs. rf fre q uency over temperature, upper sideband 16 0 4 10 14 8 2 6 12 noise figure (db) 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) +85c +25c ?40c 13868-013 figure 14 . noise figure vs. rf fre q uency over temperature, upp er sideband
hmc8200lp5me data sheet rev. b | page 10 of 25 45 0 conversion gain (db) 5 10 15 20 25 30 35 40 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) ?4dbm ?2dbm 0dbm +2dbm +4dbm 13868-014 figure 15 . conversion gain vs. rf frequency at various lo powers 40 0 ip3 (dbm) 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) 5 10 15 20 25 30 35 ?4dbm ?2dbm 0dbm +2dbm +4dbm 13868-015 figure 16 . output ip3 vs. rf frequency at various lo powers 16 0 4 10 14 8 2 6 12 noise figure (db) 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) ?4dbm ?2dbm 0dbm +2dbm +4dbm 13868-016 f igure 17 . noise figure vs. rf frequency at various lo powers 45 0 sideband rejection (dbc) 5 10 15 20 25 30 35 40 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) ?4dbm ?2dbm 0dbm +2dbm +4dbm 13868-017 figure 18 . sideband rejection vs. rf frequency at various lo powers 0 ?65 im3 (dbc) ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) ?4dbm ?2dbm 0dbm +2dbm +4dbm 13868-018 figure 19 . im3 vs. rf frequency at various lo powers 45 0 conversion gain (db) 5 10 15 20 25 30 35 40 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) 2.95v 3.13v 3.30v 3.46v 3.63v 13868-019 figure 20 . conversion gain vs. rf frequency at various v ccx
data sheet hmc8200lp5me rev. b | page 11 of 25 40 0 ip3 (dbm) 0.8 1.6 1.2 2.0 2.4 2.8 3.2 3.6 4.0 rf frequency (ghz) 5 10 15 20 25 30 35 2.95v 3.13v 3.30v 3.46v 3.63v 13868-020 figure 21. output ip3 vs. rf frequency at various v ccx 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 sideband rejection (dbc) rf frequency (ghz) 0 5 10 15 20 25 30 35 40 45 2.95v 3.13v 3.30v 3.46v 3.63v 13868-021 figure 22. sideband rejection vs. rf frequency at various v ccx 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 im3 (dbc) rf frequency (ghz) 2.95v 3.13v 3.30v 3.46v 3.63v ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 13868-022 figure 23. im3 vs. rf frequency at various v ccx 0.81.21.62.02.42.83.23.64.0 return loss (db) rf frequency (ghz) ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 +85c +25c ?40c 13868-023 figure 24. rf return loss vs. rf frequency over temperature 0 0.10.20.30.40.50.60.7 return loss (db) if frequency (ghz) ?30 ?25 ?20 ?15 ?10 ?5 0 +85c +25c ?40c 13868-024 figure 25. if return loss vs. rf frequency over temperature 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 rejection (dbc) rf frequency (ghz) 0 10 20 30 40 50 60 70 80 13868-025 figure 26. if to rf rejection vs. rf frequency at 25c
hmc8200lp5me data sheet rev. b | page 12 of 25 0.30.91.52.12.73.33.94.5 return loss (db) lo frequency (ghz) ?25 ?20 ?15 ?10 ?5 0 +85c +25c ?40c 13868-026 figure 27. lo return loss vs. rf frequency over temperature 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 rejection (dbc) lo frequency (ghz) 0 10 20 30 40 50 60 +85c +25c ?40c 13868-027 figure 28. lo to rf rejection vs. lo frequency over temperature, measurement uncalibrated for lo leakage 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 rejection (dbc) rf frequency (ghz) 0 10 20 30 40 50 60 70 +85c +25c ?40c 13868-028 figure 29. if to rf rejection vs. rf frequency over temperature, measured at the input of the external low-pass filter after c55, see figure 64 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 conversion gain (db) rf frequency (ghz) dga = 0 dga = 5 dga = 10 dga = 15 dga = 20 dga = 25 dga = 30 dga = 35 ?20 ?15 ?10 ?5 0 5 10 15 20 25 30 35 40 13868-029 figure 30. conversion gain vs. rf frequency over dga word, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga conversion gain (db) ?10 ?5 0 5 10 15 20 25 30 35 40 +85c +25c ?40c 0 5 10 15 20 25 30 35 dga (word) 13868-030 figure 31. conversion gain vs. dga word over temperature, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga, rf = 2 ghz 0 5 10 15 20 25 30 35 dga conversion gain step (db) dga (word) 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 0.8ghz 1.0ghz 2.0ghz 3.0ghz 4.0ghz 13868-031 figure 32. conversion gain step vs. dga word over rf frequency
data sheet hmc8200lp5me rev. b | page 13 of 25 conversion gain (db) ?10 ?5 0 5 10 15 20 25 30 35 40 +85c +25c ?40c 0 5 10 15 20 25 30 35 dga (word) 13868-032 figure 33 . conversion gain vs. dga word over temperature, rf = 1 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga conversion gain (db) ?20 ?5 ?10 ?15 0 5 10 15 20 25 30 35 +85c +25c ?40c 0 5 10 15 20 25 30 35 dga (word) 13868-033 figure 34 . conversion gain vs. dga word over temperature, rf = 4 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga 0 5 10 15 20 25 30 35 dga conversion gain step (db) dga (word) 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 +85c +25c ?40c 13868-034 figure 35 . conversion gain step vs. dga word over temperature, rf = 1 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga 0 5 10 15 20 25 30 35 dga conversion gain step (db) dga (word) 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 +85c +25c ?40c 13868-035 figure 36 . conversion gain step vs. dga word over temperature, r f = 2 ghz 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 ip3 (dbm) rf frequency (ghz) ?30 ?20 ?25 ?15 ?10 ?5 0 5 10 15 20 25 30 35 40 13868-036 dga = 35 dga = 30 dga = 25 dga = 20 dga = 15 dga = 10 dga = 5 dga = 0 figure 37 . output ip3 vs. rf frequency over dga word, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga ip3 (dbm) ?30 ?20 ?25 ?15 ?10 ?5 0 5 10 15 20 25 30 35 40 +85c +25c ?40c 0 5 10 15 20 25 30 35 dga (word) 13868-037 figure 38 . output ip3 vs. dga word over temperature, rf = 2 ghz, m easurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga
hmc8200lp5me data sheet rev. b | page 14 of 25 0 5 10 15 20 25 30 35 dga conversion gain step (db) dga (word) 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 +85c +25c ?40c 13868-038 figure 39. conversion gain step vs. dga word over temperature, rf = 4 ghz ip3 (dbm) ?30 ?20 ?25 ?15 ?10 ?5 0 5 10 15 20 25 30 35 40 +85c +25c ?40c 0 5 10 15 20 25 30 35 dga (word) 13868-039 figure 40. output ip3 vs. dga word over temperature, rf = 1 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga ip3 (dbm) ?35 ?30 ?20 ?25 ?15 ?10 ?5 0 5 10 15 20 25 30 35 40 +85c +25c ?40c 0 5 10 15 20 25 30 35 dga (word) 13868-040 figure 41. output ip3 vs. dga word over temperature, rf = 4 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga 0 ?5 ?10 ?15 ?20 ?25 ?30 ?40 ?35 ?35 ?50 ?55 ?60 ?70 ?65 ?75 im3 (dbm) rf frequency (ghz) 0.8 1.2 1.6 2.4 3.2 2.0 2.8 3.6 4.0 dga = 0 dga = 5 dga = 10 dga = 15 dga = 20 dga = 25 dga = 30 dga = 35 13868-041 figure 42. im3 vs. rf frequency over dga word, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga 0 ?5 ?10 ?15 ?20 ?25 ?30 ?40 ?35 ?35 ?50 ?55 ?60 ?70 ?65 ?75 im3 (dbc) dga (word) 0 5 10 20 30 15 25 35 +85c +25c ?40c 13868-042 figure 43. im3 vs. dga word over temperature, rf = 2 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga 55 50 45 40 35 30 25 15 20 10 5 0 noise figure (db) rf frequency (ghz) 0.8 1.2 1.6 2.4 3.2 2.0 2.8 3.6 4.0 dga = 0 dga = 9 dga = 18 dga = 27 dga = 35 13868-043 figure 44. noise figure vs. rf frequency over dga word at vcc_vga = 3.3 v
data sheet hmc8200lp5me rev. b | page 15 of 25 0 ?5 ?10 ?15 ?20 ?25 ?30 ?40 ?35 ?35 ?50 ?55 ?60 ?70 ?65 ?75 im3 (dbc) dga (word) 0 5 10 20 30 15 25 35 +85c +25c ?40c 13868-044 figure 45 . im3 vs. dga word over temperature, rf = 1 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga 0 ?5 ?10 ?15 ?20 ?25 ?30 ?40 ?35 ?35 ?50 ?55 ?60 ?70 ?65 ?75 im3 (dbc) dga (word) 0 5 10 20 30 15 25 35 +85c +25c ?40c 13868-045 figure 46 . im3 vs. dga word over temperature, rf = 4 ghz, measurement conducted with vcc_vga = 3.3 v (maximum gain) on rf vga 55 50 45 40 35 30 25 15 20 10 5 0 noise figure (db) rf frequency (ghz) 0.8 1.2 1.6 2.4 3.2 2.0 2.8 3.6 4.0 dga = 0 dga = 9 dga = 18 dga = 27 dga = 35 13868-046 figure 47 . noise figure vs. rf frequency ove r dga word at vcc_vga = 1.5 v 55 50 45 40 35 30 25 15 20 10 5 0 noise figure (db) rf frequency (ghz) 0.8 1.2 1.6 2.4 3.2 2.0 2.8 3.6 4.0 dga = 0 dga = 9 dga = 18 dga = 27 dga = 35 13868-047 figure 48 . noise figure vs. rf frequency over dga word at vcc_vga = 0 v 0.050 0.045 0.040 0.035 0.030 0.025 0.020 0.010 0.015 0.005 0 if log out sensitivity (v/db) input power (dbm) ?50 ?43 ?36 ?22 ?29 ?15 rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c 13868-048 figure 49 . log if detector sensitivity vs. input power over temperature and rf frequency 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.2 1.4 1.0 rf log out (v) output power (dbm) ?30 ?27 ?24 ?15 ?3 ?21 ?9 3 ?18 ?6 ?12 0 6 0.8ghz 1ghz 2ghz 3ghz 4ghz 13868-049 fig ure 50 . log rf detector vs. output power over rf frequency
hmc8200lp5me data sheet rev. b | page 16 of 25 2.5 2.0 1.5 1.0 0.5 0 if log out (v) input power (dbm) ?50 ?45 ?40 ?25 ?35 ?20 ?30 ?15 rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c 13868-050 figure 51 . log if detector output vs. input power over temperature and rf frequency 3.5 3.0 2.5 2.0 1.0 1.5 0.5 0 slpd out (v) input power (dbm) ?50 ?43 ?36 ?29 ?22 ?15 rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c rf = 1ghz at +85c rf = 1ghz at +25c rf = 1ghz at ?40c 13868-051 figure 52 . square law detector output vs. input power over temperature and rf frequency 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.2 1.4 1.0 rf log out (v) output power (dbm) ?30 ?27 ?24 ?15 ?3 ?21 ?9 3 ?18 ?6 ?12 0 6 +85c +25c ?40c 13868-052 figure 53 . log rf detector vs. output power over temperature, rf = 0.8 ghz 2.8 2.6 2.4 2.2 1.0 1.6 1.4 1.2 1.8 2.0 ?30 ?24 ?27 ?21 ?18 ?15 ?12 ?9 ?6 ?3 0 3 6 rf log out (v) output power (dbm) +85c +25c ?40c 13868-053 figure 54 . log rf detector vs. output power over temperature, rf = 2 ghz 40 35 30 0 15 10 5 20 25 conversion gain (db) control voltage (v) 0.5 1.0 1.5 2.0 2.5 3.0 0.8ghz 1.0ghz 2.0ghz 3.0ghz 4.0ghz 13868-054 figure 55 . conversion gain vs. vga control voltage over rf frequency, measurement conducted with dga = 35 (maximum gain) on if dga 40 35 30 0 15 10 5 20 25 conversion gain (db) control voltage (v) 0.5 1.0 1.5 2.0 2.5 3.0 +85c +25c ?40c 13868-055 figure 56 . conversion gain vs. vga control voltage over tem perature, rf = 2 ghz, measurement conducted with dga = 35 (maximum gain) on if dga
data sheet hmc8200lp5me rev. b | page 17 of 25 2.8 2.6 2.4 2.2 1.0 1.6 1.4 1.2 1.8 2.0 ?30 ?24 ?27 ?21 ?18 ?15 ?12 ?9 ?6 ?3 0 3 6 rf log out (v) output power (dbm) +85c +25c ?40c 13868-056 figure 57 . log rf detector vs. output power over temperature, rf = 4 ghz 40 35 30 0 15 10 5 20 25 conversion gain (db) control voltage (v) 0.5 1.0 1.5 2.0 2.5 3.0 +85c +25c ?40c 13868-057 figure 58 . conversion gain vs. vga contro l voltage over temperature, rf = 1 ghz, measurement conducted with dga = 35 (maximum gain) on if dga 40 35 30 0 15 10 5 20 25 conversion gain (db) control voltage (v) 0.5 1.0 1.5 2.0 2.5 3.0 +85c +25c ?40c 13868-058 figure 59 . conversion gain vs. vga control voltage over temperature, rf = 4 ghz, measurement conducted with dga = 35 (maximum gain) on if dga
hmc8200lp5me data sheet rev. b | page 18 of 25 theory of operation the hmc8200lp5me is a highly integrated intermediate frequency ( if ) trans ceiver chip that converts intermediate frequency to a single - en ded radio frequency (rf) signal at its output. the intermediate frequency (if) can be supplied to the hmc8200lp5me singled ended or through the baseband differential inputs. the single - end ed input of the hmc8200lp5me utilizes an input digital gain amplifier (dga) that is controlled via spi, which feeds the if signals to an image reject mixer. at the input of the device befo re the dga, an intermediate log power detector can be used to monitor input power levels into the device. a square law detector follows the dga to monitor the power entering the mixer. see the register array assignments and serial interface section for more information regarding the dga . the baseband differential inputs of the hmc8200lp5me feed the intermediate frequency directly into the image reject mixer. it is recommended that wh en using the single - ended input , do not leave the baseband differential inputs connected. the local oscillator port can either be driven single ended through lo _ n or differentially through the combination of lo _ n and lo _ p. i f driving th e local oscillator port differential ly improves the lo to rf rejection . the if is then converted to rf , which is followed by an amplifier. next, t he amplified rf signal is fed off chip to a low - pass filter. the external filter path feeds back into a variab le gain amplifier (vga) that is voltage controlled. the output of the vga drives a final amplifier that is the output of the device. a n rf log detector is connected to the output of the final amplifier to monitor the output power of the hmc8200lp5me . the hmc8200lp5me utilizes an input low noise amplifier (lna) cascaded with a vga , which can either be controlled by the inter nal agc or external voltages, that feeds the rf signals to an image reject mixer. the local oscillator port can either be driven single ended through lo _ n or differentially through the combination of lo _ n and lo _ p. the radio frequency is then conver ted to intermediate frequencies , which can either feed off chip via baseband differential outputs or feed on chip into a programmable band - pass filter. it is recommended during if mode operation that the baseband outputs be unconnected. the programmable band - pa ss filter on chip has four program - mable bandwidths (14 mhz , 28 mhz , 56 mhz , and 112 mhz). the programmable band - pass filter has the capability to adjust the center frequency. from the factory, a filter calibration is conducted and the center frequency of the filter is set to 140 mhz. this calibration can be recalled via spi control or the customer can adjust the center frequency, but the calibration value must be stored off c hip ( see the register array assignments section) . an ext ernal filter option can be utilized to allow the customer to select other filter bandwidths/responses that are not available on chip. the external filter path coming from the image reject mixer feeds into an amplifier that has differential outputs. the out put of the external filter can be fed back into the chip, which is then connected to another amplifier. a vga follows immediately after the band - pass filter. control t he if vga either by the agc or external voltages. the output of the variable gain amplif ier is the output of the device. register array assig nments and serial interface the register arrays for the hmc8200lp5me are organized into seven registers of 16 bits. using the serial in terface, the arrays are written or read one row at a time , as shown in figure 61 and figure 62. figure 61 shows the sequence of signals on the enable (sen), clk, and data (sdi) l ines t o write one 16 - bit array of data to a single register. the enable line goes low, the first of 24 data bits is placed on the data line , and the data is sampled on the rising edge of the clock. the data line should remain stable for at least 2 ns after the rising edge of clk. the d evice support s a serial interface running up to 10 mhz, the interface is 3.3 v cmos logic. a write operation requires 24 data bits and 24 clock pulses, as s ho wn in figure 61 . the 24 data bits conta in the 3 - bit chip address, followed by the 5 - bit register array number, and finally the 16 - bit register data. after the 24th clock pulses of the write operation, the enable line returns high to load the register array on the ic. a read operation requires 2 4 data bits and 48 clock pulses, as shown in figure 62. for every register read operation, a write to register 7 is required first. the data written should contain the 3- bit chip address, followed by the 5 - bit register number for r egister 7, and finally the 5 - bit number of the register to be read. the remaining 11 bits should be logic zero es. when the read operation is initiated , the data is available on the d ata o utput (sdo) pin. read exa mple if reading r egister 2, the following 2 4 bits should be written to initiate the read operation. 00000000000 00010 00 11 1 1 10 zero bits (11 bits) register 7 address (5 bits) register to be read (5 bits) chip address (3 bits) 13868-059 figure 60 . sample bits to initiate read
data sheet hmc8200lp5me rev. b | page 19 of 25 24 clock cycles sen clk 1 24 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 sdi write data register address chip address msb lsb msb lsb lsb msb 13868-060 figure 61 . timing diagram, spi register write 24 clock cycles 24 clock cycles sen 1 1 24 24 all zeros read data read register address reg 7 address chip address clk sdi sdo msb lsb msb lsb msb lsb msb lsb msb 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 13868-061 figure 62 . timing diagram, s pi register read
hmc8200lp5me data sheet rev. b | page 20 of 25 register descriptions register array assignments in the access columns (table 6 through table 12), r means read, w means write, and r/w means read/write. enable bits table 6. enable register, (address 0x01) bit no. bit name description reset access [15:13] reserved not used 0x6 r/w 12 log_if_en log intermediate frequency (if) detector enable 0x1 r/w 0 = disable 1 = enable 11 d2se_en differential to single (after mixer) enable 0x1 r/w 0 = disable 1 = enable 10 factory diagnostics 0 = logic 0 for normal operation 0x0 r/w 9 cm_buffer_en common-mode buffer enable 0x0 r/w 0 = disable 1 = enable 8 factory diagnostics 1 = logic 1 for normal operation 0x1 r/w 7 log_det_en log detector enable 0x1 r/w 0 = disable 1 = enable 6 ms_en square detector enable 0x1 r/w 0 = disable 1 = enable 5 envelope_en envelope detector enable 0x1 r/w 0 = enable 1 = disable 4 vga_en variable gain ampl ifier (vga) enable 0x1 r/w 0 = disable 1 = enable 3 irm_en image reject mixer enable 0x1 r/w 0 = disable 1 = enable 2 irm_iq_en iq line enable 0x0 r/w 0 = disable 1 = enable 1 dga_en digital gain amplifier (dga) enable 0x1 r/w 0 = disable 1 = enable 0 lpf_en low-pass filter enable 0x0 r/w 0 = disable 1 = enable
data sheet hmc8200lp5me rev. b | page 21 of 25 digital gain amplifier: dga control table 7 . digital gain amplifier (address 0x0 3 ) b i t no. bit name description reset access 15 reserved not used 0x0 r/w [14:9] dga_ctrl ove r ride spi fil2_frq_set and use 8 - bit word from otp 0x0 r/w 0 = minimum gain 1 = 100011 = maximum gai n [ 8:0 ] reserved not used 0x 0 r/w digital gain amplifier: amplifier current , envelope level , and vga attenuation bias table 8 . digital gain amplifier, (address 0x04 ) bit no. bit name description reset access [15: 9 ] reserved not used 0000111 r/w [8:7] amp_cur amplifier current 11 r/w [6:2] env_lvl envelope level 11100 r/w [1:0] vga_att_bias vga attenuation bias 10 r/w image reject mixer : sideband, and polarity and offset for i table 9 . image reject mixer register, (address 0x0 5 ) bit no. bit name description reset access [15:12] reserved reserved 0010 logic 0010 for normal operation 11 irm_is image sideband 1 r/w 0 = upper sideband 1 = lower sideband [10:9] reserved reserved 01 r/w logic 01 for normal operation 8 offset_polarity_i offset polarity i 0 r/w [ 7 :0] irm_offset_i image reject mixer offset for i 0x0 r/w image reject mixer: polarity and offset for q table 10 . image reject mixer register, (add ress 0x06) bit no. bit name description reset access [15: 9 ] reserved not used 1111000 r/w 8 offset_polarity_q offset polarity q 0 r/w [7:0] irm_offset_q image reject mixer offset for q 0x0 r/w
hmc8200lp5me data sheet rev. b | page 22 of 25 phase i: adjust table 11. phase i register , (address 0x0 8 ) bit no. bit name description reset access [15: 9 ] reserved not used 1111000 r/w [8:0] i_phase_adj i phase adjust 0x0 r/w phase q: adjust table 12. phase q register, (address 0x0 9 ) bit no. bit name descri ption reset access [15:9] reserved not used 1111000 r/w [8:0] q _phase_adj q phase adjust 0x0 r/w
data sheet hmc8200lp5me rev. b | page 23 of 25 evaluation printed c ircuit board (pcb) l o g i f b b q p g n d g n d g n d v c c _ 3 p 3 v g n d b b i p t x _ o u t v g a c tr l l o g r f s l p d o u t e n v n e n v p l o n l o p b b i n t x i f i n b b q n 600 - 006 63 - 00 -2 c 5 6 c 5 5 c 6 1 c 6 2 c 6 5 c 6 4 c 6 3 r 1 6 j 1 r 3 r 1 4 c 5 7 c 5 9 c 5 8 c 6 0 j 1 5 r 1 3 c 5 4 r 1 7 r 1 5 c 5 0 c 4 9 c 4 8 c 4 5 c 4 7 c 4 6 c 4 3 c 4 2 c 2 1 c 4 0 c 3 8 c 3 7 c 3 6 c 6 c 4 c 3 5 c 3 3 c 2 9 c 2 3 c 2 7 c 2 5 c 1 9 c 1 4 c 4 4 c 1 0 c 1 l 1 l 2 c 3 1 c 1 6 c 5 c 2 8 c 1 7 c 1 1 j p 1 j 3 r 4 r 5 r 6 r 7 f 1 c 1 8 c 1 5 c 2 0 c 2 6 c 3 2 c 3 4 c 2 4 c 3 0 c 2 2 c 3 c 2 u 2 13868-063 figure 63 . evaluation pcb
hmc8200lp5me data sheet rev. b | page 24 of 25 evaluation pcb schem atic 17 18 19 20 21 22 23 24 lo_n lo_p sen sclk sdi spi sdo rst v cc 9 v cc 2 v cc 3 c40 10f c10 10nf c14 10nf c15 100pf c17 1000pf c5 100pf c6 10nf v cc 4 c63 100pf c64 10nf c28 100pf c29 10nf c48 10f c11 100pf c24 100pf c25 10nf c46 10f c55 100pf c31 100pf c56 100pf c54 100pf r13 1k? v cc 5 jp1 c26 100pf c27 10nf c30 5pf rf out l2 15nh if in v cc 8 v cc 6 c22 100pf c20 100pf c23 10nf c45 10f v cc 7 det3 det2 det1 v cc 10 r3 24.9? l1 330nh v cc 1/dga_s1 c43 10f c19 10nf c18 100pf v ctrl r5 10k? r5 10k? det3 c34 100pf c33 10nf c50 10f c32 100pf c33 10nf c49 10f v cc _agc r7 10k? r6 10k? 3 4 5 v v 2 1 25 26 27 28 29 30 31 32 1 3 4 2 5 6 7 8 9 12 11 10 13 14 15 16 13868-062 figure 64 . pcb schematic/typical applications circuit
data sheet hmc8200lp5me rev. b | page 25 of 25 outline dimensions 02-26-2016- a 1 0.50 bsc bot t om view top view pin 1 indic at or 32 9 16 17 24 25 8 pin 1 indic at or sea ting plane 0.05 max 0.02 nom 0.20 ref coplanarity 0.08 0.31 0.25 0.19 5.10 5.00 sq 4.90 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 0.50 0.40 0.30 1.00 0.85 0.80 0.20 min 3.20 3.10 sq 3.00 pkg-000000 3.50 ref compliant to jedec standards mo-220-vhhd-2 exposed pa d figure 65 . 32 - lead lead frame chip scale package [lfcsp ] 5 mm 5 mm body, 0.85 mm package height (cp - 32 - 27) dimensions shown in millimeters ordering guide model 1 , 2 temperature range msl rating 3 package description package option package marking 4 qty. hmc8200lp5me ?40 c to +85c msl3 32- lead lead frame chip scale package [lfcsp] , tape and reel cp -32- 27 xxxx h8200 50 hmc8200lp5metr ?40 c to +85c msl3 32 - lead lead frame chip scale package [lfcsp] , tape and reel cp - 32 - 27 xxxx h8200 500 EK1HMC8200LP5M evaluation kit 1 all products listed in the ordering guide are rohs compliant . 2 the hmc8200lp5me lead finish is nipdau. 3 see the absolute maximum ratings section. 4 xxxx is the 4 - digit lot number. ? 2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d13868 -0- 6/16(b)

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